"An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset ..."

Jaime Ramírez-Angulo et al. (2008)

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DOI: 10.1109/VLSI.2008.30

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Jaime Ramírez-Angulo, Lalitha Mohana Kalyani-Garimella, Annajirao Garimella, Sri Raga Sudha Garimella, Antonio J. López-Martín, Ramón González Carvajal:
An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators. VLSI Design 2008: 294-299

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