"VLSI Implementation of 2-D DWT/IDWT Cores Using 9/7-Tap Filter Banks Based ..."

Kavish Seth, S. Srinivasan (2002)

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DOI: 10.1109/ASPDAC.2002.994959

access: closed

type: Conference or Workshop Paper

metadata version: 2022-11-14

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Kavish Seth, S. Srinivasan:
VLSI Implementation of 2-D DWT/IDWT Cores Using 9/7-Tap Filter Banks Based on the Non-Expansive Symmetric Extension Scheme. ASP-DAC/VLSI Design 2002: 435-440

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