"A 12-bit 10GS/s 16-Channel Time-Interleaved ADC with a Digital Processing ..."

Kyoung-Jun Moon et al. (2022)

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DOI: 10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830208

access: closed

type: Conference or Workshop Paper

metadata version: 2025-03-03

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Kyoung-Jun Moon, Dong-Ryeol Oh, Young-Hyo Park, Kyung-Hoon Lee, Sun-Jae Park, Sung-No Lee, Hee-Chang Hwang, Hyo-Chul Shin, Young-Jae Cho, Michael Choi, Jongshin Shin:
A 12-bit 10GS/s 16-Channel Time-Interleaved ADC with a Digital Processing Timing-Skew Background Calibration in 5nm FinFET. VLSI Technology and Circuits 2022: 172-173

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