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"An Efficient Test Relaxation Technique for Combinational & Full-Scan ..."

Aiman El-Maleh, Ali Al-Suwaiyan (2002)

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DOI: 10.1109/VTS.2002.1011111

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/vts/El-MalehA02
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  persistent URL:
  - https://dblp.org/rec/conf/vts/El-MalehA02
Aiman El-Maleh, Ali Al-Suwaiyan:
An Efficient Test Relaxation Technique for Combinational & Full-Scan Sequential Circuits. VTS 2002: 53-59

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