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"A Coarse-Grained FPGA Architecture for High-Performance FIR Filtering."

James R. Anderson, Siddharth Sheth, Kaushik Roy (1998)

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DOI: 10.1145/275107.275143

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  dblp key:
  - conf/fpga/AndersonSR98
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  - https://dblp.org/rec/conf/fpga/AndersonSR98
James R. Anderson, Siddharth Sheth, Kaushik Roy:
A Coarse-Grained FPGA Architecture for High-Performance FIR Filtering. FPGA 1998: 234-244

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