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"High-speed, high-bandwidth DRAM memory bus with crosstalk transfer logic ..."

Hideki Osaka et al. (2001)

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DOI: 10.1109/HIS.2001.946695

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - conf/hoti/OsakaKHW01
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  - https://dblp.org/rec/conf/hoti/OsakaKHW01
Hideki Osaka, Toyohiko Komatsu, Susumu Hatano, Takeshi Wada:
High-speed, high-bandwidth DRAM memory bus with crosstalk transfer logic (XTL) interface. Hot Interconnects 2001: 63-67

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