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"Process variation aware data management for STT-RAM cache design."

Zhenyu Sun, Xiuyuan Bi, Hai Li (2012)

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DOI: 10.1145/2333660.2333706

access: closed

type: Conference or Workshop Paper

metadata version: 2022-08-10

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  - conf/islped/SunBL12
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Zhenyu Sun, Xiuyuan Bi, Hai Li:
Process variation aware data management for STT-RAM cache design. ISLPED 2012: 179-184

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