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"A 17.5-to-20.94GHz and 35-to-41.88GHz PLL in 65nm CMOS for wireless HD ..."

Olivier Richard et al. (2010)

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DOI: 10.1109/ISSCC.2010.5433941

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

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Olivier Richard, Alexandre Siligaris, Franck Badets, Cedric Dehos, Cedric Dufis, Pierre Busson, Pierre Vincent, Didier Belot, Pascal Urard:
A 17.5-to-20.94GHz and 35-to-41.88GHz PLL in 65nm CMOS for wireless HD applications. ISSCC 2010: 252-253

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