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"Design of High-Speed Low-Power Parallel-Prefix VLSI Adders."

Giorgos Dimitrakopoulos et al. (2004)

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DOI: 10.1007/978-3-540-30205-6_27

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-15

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  dblp key:
  - conf/patmos/DimitrakopoulosKKN04
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  - https://dblp.org/rec/conf/patmos/DimitrakopoulosKKN04
Giorgos Dimitrakopoulos, Pavlos Kolovos, P. Kalogerakis, Dimitris Nikolos:
Design of High-Speed Low-Power Parallel-Prefix VLSI Adders. PATMOS 2004: 248-257

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