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"A Technique to Reduce Static and Dynamic Power of Functional Units in ..."

Guadalupe Miñana et al. (2006)

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DOI: 10.1007/11847083_50

access: closed

type: Conference or Workshop Paper

metadata version: 2022-04-09

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  dblp key:
  - conf/patmos/MinanaHGLCL06
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Guadalupe Miñana, José Ignacio Hidalgo, Oscar Garnica, Juan Lanchares, José Manuel Colmenar, Sonia López:
A Technique to Reduce Static and Dynamic Power of Functional Units in High-Performance Processors. PATMOS 2006: 514-523

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