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"A Power Model Combined of Architectural Level and Gate Level for Multicore ..."

Manman Peng, Yan Hu (2013)

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DOI: 10.1109/TRUSTCOM.2013.204

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
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  persistent URL:
  - https://dblp.org/rec/conf/trustcom/PengH13
Manman Peng, Yan Hu:
A Power Model Combined of Architectural Level and Gate Level for Multicore Processors. TrustCom/ISPA/IUCC 2013: 1652-1655

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