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"An 8-Gb 12-Gb/s/pin GDDR5X DRAM for Cost-Effective High-Performance ..."

Martin Brox et al. (2018)

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DOI: 10.1109/JSSC.2017.2737945

access: closed

type: Journal Article

metadata version: 2020-09-09

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  - https://dblp.org/rec/journals/jssc/BroxBBCDFGHHLIK18
Martin Brox, Mani Balakrishnan, Martin Broschwitz, Cristian Chetreanu, Stefan Dietrich, Fabien Funfrock, Marcos Alvarez Gonzalez, Thomas Hein, Eugen Huber, Daniel Lauber, Milena Ivanov, Maksim Kuzmenka, Chris Mohr, Juan Ocon Garrido, Swetha Padaraju, Sven Piatkowski, Jan Pottgiesser, Peter Pfefferl, Manfred Plan, Jens Polney, Stephan Rau, Michael Richter, Ronny Schneider, Ralf Oliver Seitter, Wolfgang Spirkl, Marc Walter, Jörg Weller, Filippo Vitale:
An 8-Gb 12-Gb/s/pin GDDR5X DRAM for Cost-Effective High-Performance Applications. IEEE J. Solid State Circuits 53(1): 134-143 (2018)

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