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"A 6.7 MHz to 1.24 GHz 0.0318 mm 2 Fast-Locking All-Digital DLL ..."
Min-Han Hsieh et al. (2016)
- Min-Han Hsieh, Liang-Hsin Chen, Shen-Iuan Liu, Charlie Chung-Ping Chen:
A 6.7 MHz to 1.24 GHz 0.0318 mm 2 Fast-Locking All-Digital DLL Using Phase-Tracing Delay Unit in 90 nm CMOS. IEEE J. Solid State Circuits 51(2): 412-427 (2016)
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