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ORCID"A 3.6 GHz Low-Noise Fractional-N Digital PLL Using SAR-ADC-Based TDC."
Zule Xu et al. (2016)
- Zule Xu
, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa:
A 3.6 GHz Low-Noise Fractional-N Digital PLL Using SAR-ADC-Based TDC. IEEE J. Solid State Circuits 51(10): 2345-2356 (2016)
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