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"A phase adaptive cache hierarchy for SMT processors."

Sonia López et al. (2011)

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DOI: 10.1016/J.MICPRO.2011.08.008

access: closed

type: Journal Article

metadata version: 2022-04-09

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  - https://dblp.org/rec/journals/mam/LopezGADLH11
Sonia López, Oscar Garnica, David H. Albonesi, Steven G. Dropsho, Juan Lanchares, José Ignacio Hidalgo:
A phase adaptive cache hierarchy for SMT processors. Microprocess. Microsystems 35(8): 683-694 (2011)

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