Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"A fast transistor-chaining algorithm for CMOS cell layout."

Chi-Yi Hwang et al. (1990)

> Home

Details and statistics

DOI: 10.1109/43.55207

access: closed

type: Journal Article

metadata version: 2020-09-24

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcad/HwangHLH90
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcad/HwangHLH90
Chi-Yi Hwang, Yung-Chin Hsieh, Youn-Long Lin, Yu-Chin Hsu:
A fast transistor-chaining algorithm for CMOS cell layout. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(7): 781-786 (1990)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.