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"Performance and Energy-Efficient Design of STT-RAM Last-Level Cache."

Fazal Hameed, Asif Ali Khan, Jerónimo Castrillón (2018)

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DOI: 10.1109/TVLSI.2018.2804938

access: closed

type: Journal Article

metadata version: 2020-03-11

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  - https://dblp.org/rec/journals/tvlsi/HameedKC18
Fazal Hameed, Asif Ali Khan, Jerónimo Castrillón:
Performance and Energy-Efficient Design of STT-RAM Last-Level Cache. IEEE Trans. Very Large Scale Integr. Syst. 26(6): 1059-1072 (2018)

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