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"A Low-Area Multi-Link Interconnect Architecture for GALS Chip Multiprocessors."

Zhiyi Yu, Bevan M. Baas (2010)

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DOI: 10.1109/TVLSI.2009.2017912

access: closed

type: Journal Article

metadata version: 2020-03-11

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Zhiyi Yu, Bevan M. Baas:
A Low-Area Multi-Link Interconnect Architecture for GALS Chip Multiprocessors. IEEE Trans. Very Large Scale Integr. Syst. 18(5): 750-762 (2010)

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