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"Iterative-Gradient Based Complex Divider FPGA Core with Dynamic ..."

Francisco Javier López-Martínez et al. (2011)

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DOI: 10.1007/S11265-010-0464-Y

access: closed

type: Journal Article

metadata version: 2022-09-26

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Francisco Javier López-Martínez, Eduardo del Castillo-Sánchez, José T. Entrambasaguas, Eduardo Martos-Naya:
Iterative-Gradient Based Complex Divider FPGA Core with Dynamic Configurability of Accuracy and Throughput. J. Signal Process. Syst. 62(3): 319-324 (2011)

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