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"Secure Scan Architecture for Enhanced Testability and Resistance Against ..."
A. Swetha Priya, S. Kamatchi, E. Lakshmi Prasad (2025)
- A. Swetha Priya
, S. Kamatchi
, E. Lakshmi Prasad:
Secure Scan Architecture for Enhanced Testability and Resistance Against Side-Channel Attacks in Cryptographic ICs. IEEE Access 13: 98837-98846 (2025)

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