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"FPGA design of FFT based intelligent accelerator with optimized Wallace ..."
L. Malathi, A. Bharathi, A. N. Jayanthi (2024)
- L. Malathi

, A. Bharathi, A. N. Jayanthi:
FPGA design of FFT based intelligent accelerator with optimized Wallace tree multiplier for image super resolution and quality enhancement. Biomed. Signal Process. Control. 88(Part B): 105599 (2024)

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