"A new VLSI algorithm and architecture for the hardware implementation of ..."

Doru-Florin Chiper (2011)

> Home

Details and statistics

DOI: 10.2478/S13537-011-0015-Z

access: open

type: Journal Article

metadata version: 2023-08-28

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/cejcs/Chiper11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/cejcs/Chiper11
Doru-Florin Chiper:
A new VLSI algorithm and architecture for the hardware implementation of type IV discrete cosine transform using a pseudo-band correlation structure. Central Eur. J. Comput. Sci. 1(2): 243-250 (2011)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.