"Benchmarking Large Language Models for Automated Verilog RTL Code Generation."

Shailja Thakur et al. (2022)

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DOI: 10.48550/ARXIV.2212.11140

access: open

type: Informal or Other Publication

metadata version: 2024-05-07

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  - https://dblp.org/rec/journals/corr/abs-2212-11140
Shailja Thakur, Baleegh Ahmad, Zhenxing Fan, Hammond Pearce, Benjamin Tan, Ramesh Karri, Brendan Dolan-Gavitt, Siddharth Garg:
Benchmarking Large Language Models for Automated Verilog RTL Code Generation. CoRR abs/2212.11140 (2022)

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