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"Learning Robust and Correct Controllers from Signal Temporal Logic ..."

Wenliang Liu, Wei Xiao, Calin Belta (2023)

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DOI: 10.48550/ARXIV.2304.06160

access: open

type: Informal or Other Publication

metadata version: 2023-04-19

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  dblp key:
  - journals/corr/abs-2304-06160
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  - https://dblp.org/rec/journals/corr/abs-2304-06160
Wenliang Liu, Wei Xiao, Calin Belta:
Learning Robust and Correct Controllers from Signal Temporal Logic Specifications Using BarrierNet. CoRR abs/2304.06160 (2023)

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