"RealBench: Benchmarking Verilog Generation Models with Real-World IP Designs."

Pengwei Jin et al. (2025)

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DOI: 10.48550/ARXIV.2507.16200

access: open

type: Informal or Other Publication

metadata version: 2025-08-19

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Pengwei Jin, Di Huang, Chongxiao Li, Shuyao Cheng, Yang Zhao, Xinyao Zheng, Jiaguo Zhu, Shuyi Xing, Bohan Dou, Rui Zhang, Zidong Du, Qi Guo, Xing Hu:
RealBench: Benchmarking Verilog Generation Models with Real-World IP Designs. CoRR abs/2507.16200 (2025)

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