"Hardware Optimized FPGA Implementations of High-Speed True Random Bit ..."

Talal Bonny et al. (2019)

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DOI: 10.1007/S00034-018-0905-6

access: closed

type: Journal Article

metadata version: 2022-01-03

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  - https://dblp.org/rec/journals/cssp/BonnyDME19
Talal Bonny, Ridhwan Al Debsi, Sohaib Majzoub, Ahmed S. Elwakil:
Hardware Optimized FPGA Implementations of High-Speed True Random Bit Generators Based on Switching-Type Chaotic Oscillators. Circuits Syst. Signal Process. 38(3): 1342-1359 (2019)

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