"Modeling and Analysis of On-Chip Single and H-tree Distributed RLC ..."

Mummaneni Kavicharan et al. (2016)

> Home

Details and statistics

DOI: 10.1007/S00034-015-0188-0

access: closed

type: Journal Article

metadata version: 2020-06-21

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/cssp/KavicharanMRP16
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/cssp/KavicharanMRP16
Mummaneni Kavicharan, Nukala Suryanarayana Murthy, N. Bheema Rao, Addanki Prathima:
Modeling and Analysis of On-Chip Single and H-tree Distributed RLC Interconnects. Circuits Syst. Signal Process. 35(9): 3049-3065 (2016)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.