"Design of Low-Power 10-Transistor Full Adder Using GDI Technique for ..."

T. Nirmalraj et al. (2023)

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DOI: 10.1007/S00034-022-02287-X

access: closed

type: Journal Article

metadata version: 2023-11-12

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T. Nirmalraj, S. K. Pandiyan, Rakesh Kumar Karan, R. Sivaraman, Rengarajan Amirtharajan:
Design of Low-Power 10-Transistor Full Adder Using GDI Technique for Energy-Efficient Arithmetic Applications. Circuits Syst. Signal Process. 42(6): 3649-3667 (2023)

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