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"An Efficient FPGA-Based Network-on-Chip Simulation Framework Utilizing the ..."

Prabhu B. M. Prasad, Khyamling Parane, Basavaraj Talawar (2020)

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DOI: 10.1007/S00034-020-01411-Z

access: closed

type: Journal Article

metadata version: 2024-02-05

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  - https://dblp.org/rec/journals/cssp/PrasadPT20
Prabhu B. M. Prasad, Khyamling Parane, Basavaraj Talawar:
An Efficient FPGA-Based Network-on-Chip Simulation Framework Utilizing the Hard Blocks. Circuits Syst. Signal Process. 39(10): 5247-5271 (2020)

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