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"CNFET-Based Ultra-Low-Power Dual-V_DD Ternary Half Adder."

Abhay S. Vidhyadharan, Kasthuri Bha, Sanjay Vidhyadharan (2021)

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DOI: 10.1007/S00034-021-01664-2

access: closed

type: Journal Article

metadata version: 2021-07-29

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  dblp key:
  - journals/cssp/VidhyadharanBV21
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  - https://dblp.org/rec/journals/cssp/VidhyadharanBV21
Abhay S. Vidhyadharan, Kasthuri Bha, Sanjay Vidhyadharan:
CNFET-Based Ultra-Low-Power Dual-V_DD Ternary Half Adder. Circuits Syst. Signal Process. 40(8): 4089-4105 (2021)

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