"Digital Circuit Design for the Square Root Computation by Means of ..."

Ricardo Paez Villa et al. (2025)

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DOI: 10.1109/LES.2024.3435477

access: closed

type: Journal Article

metadata version: 2025-09-06

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Ricardo Paez Villa, Jorge Rivera, Juan José Raygoza-Panduro, Edwin C. Becerra-Alvarez, Susana Ortega-Cisneros:
Digital Circuit Design for the Square Root Computation by Means of Unfolding Techniques. IEEE Embed. Syst. Lett. 17(1): 62-65 (2025)

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