"True hardware random number generation implemented in the 32-nm SOI ..."

John S. Liberty et al. (2013)

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DOI: 10.1147/JRD.2013.2279599

access: closed

type: Journal Article

metadata version: 2020-03-13

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John S. Liberty, Adrian Barrera, David W. Boerstler, Thomas B. Chadwick, Scott R. Cottier, H. Peter Hofstee, Julie A. Rosser, Marty L. Tsai:
True hardware random number generation implemented in the 32-nm SOI POWER7+ processor. IBM J. Res. Dev. 57(6) (2013)

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