"Multi-core architecture with asynchronous clocks to prevent power analysis ..."

Yuan Du et al. (2017)

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DOI: 10.1587/ELEX.14.20161220

access: open

type: Journal Article

metadata version: 2021-02-12

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  - journals/ieiceee/DuYJLLSC17
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  - https://dblp.org/rec/journals/ieiceee/DuYJLLSC17
Yuan Du, Yong Ye, Weiliang Jing, Zhenhua Li, Xiaoyun Li, Zhitang Song, Bomy Chen:
Multi-core architecture with asynchronous clocks to prevent power analysis attacks. IEICE Electron. Express 14(4): 20161220 (2017)

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