"FPGA implementation of a challenge pre-processing structure arbiter PUF ..."

Wei Ge et al. (2020)

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DOI: 10.1587/ELEX.16.20190670

access: open

type: Journal Article

metadata version: 2025-01-19

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Wei Ge, Shenxin Hu, Ji Quan Huang, Bo Liu, Min Zhu:
FPGA implementation of a challenge pre-processing structure arbiter PUF designed for machine learning attack resistance. IEICE Electron. Express 17(2): 20190670 (2020)

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