"Circuit and layout combination technique to enhance multiple nodes upset ..."

Xu Hui, Zeng Yun (2015)

> Home

Details and statistics

DOI: 10.1587/ELEX.12.20150286

access: open

type: Journal Article

metadata version: 2021-02-12

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/ieiceee/HuiY15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieiceee/HuiY15
Xu Hui, Zeng Yun:
Circuit and layout combination technique to enhance multiple nodes upset tolerance in latches. IEICE Electron. Express 12(9): 20150286 (2015)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.