![](https://dblp.dagstuhl.de/img/logo.ua.320x120.png)
![](https://dblp.dagstuhl.de/img/dropdown.dark.16x16.png)
![](https://dblp.dagstuhl.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.dagstuhl.de/img/search.dark.16x16.png)
![search dblp](https://dblp.dagstuhl.de/img/search.dark.16x16.png)
default search action
"472MHz throughput asynchronous FIFO design on a Virtex-5 FPGA device."
Jeong-Gun Lee et al. (2011)
- Jeong-Gun Lee, Deok-Young Lee, Myeong-Hoon Oh, Young Woong Ko:
472MHz throughput asynchronous FIFO design on a Virtex-5 FPGA device. IEICE Electron. Express 8(9): 676-683 (2011)
![](https://dblp.dagstuhl.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.