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"Improvement of the bit-stream squarer and square root circuit based on ..."

Yong Liang et al. (2014)

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DOI: 10.1587/ELEX.11.20140575

access: open

type: Journal Article

metadata version: 2021-02-12

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  dblp key:
  - journals/ieiceee/LiangWMGZ14
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  - https://dblp.org/rec/journals/ieiceee/LiangWMGZ14
Yong Liang, Zhigong Wang, Qiao Meng, Xiaodan Guo, Changchun Zhang:
Improvement of the bit-stream squarer and square root circuit based on ΣΔ modulation. IEICE Electron. Express 11(17): 20140575 (2014)

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