"64-Bit High-Performance Power-Aware Conditional Carry Adder Design."

Kuo-Hsing Cheng, Shun-Wen Cheng (2005)

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DOI: 10.1093/IETELE/E88-C.6.1322

access: closed

type: Journal Article

metadata version: 2020-04-11

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Kuo-Hsing Cheng, Shun-Wen Cheng:
64-Bit High-Performance Power-Aware Conditional Carry Adder Design. IEICE Trans. Electron. 88-C(6): 1322-1331 (2005)

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