"Power Noise Measurements of Cryptographic VLSI Circuits Regarding ..."

Daisuke Fujimoto et al. (2014)

> Home

Details and statistics

DOI: 10.1587/TRANSELE.E97.C.272

access: closed

type: Journal Article

metadata version: 2021-10-14

- view
  authority control:
- export record
  dblp key:
  - journals/ieicet/FujimotoMNHHAHKSLBBBD14
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieicet/FujimotoMNHHAHKSLBBBD14
Daisuke Fujimoto, Noriyuki Miura, Makoto Nagata, Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki, Yohei Hori, Toshihiro Katashita, Kazuo Sakiyama, Thanh-Ha Le, Julien Bringer, Pirouz Bazargan-Sabet, Shivam Bhasin, Jean-Luc Danger:
Power Noise Measurements of Cryptographic VLSI Circuits Regarding Side-Channel Information Leakage. IEICE Trans. Electron. 97-C(4): 272-279 (2014)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.