"A Lower Bound on the Gate Count of Toffoli-Based Reversible Logic Circuits."

Takashi Hirayama et al. (2014)

> Home

Details and statistics

DOI: 10.1587/TRANSINF.2013LOP0013

access: closed

type: Journal Article

metadata version: 2020-04-11

- view
  authority control:
- export record
  dblp key:
  - journals/ieicet/HirayamaSYN14
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieicet/HirayamaSYN14
Takashi Hirayama, Hayato Sugawara, Katsuhisa Yamanaka, Yasuaki Nishitani:
A Lower Bound on the Gate Count of Toffoli-Based Reversible Logic Circuits. IEICE Trans. Inf. Syst. 97-D(9): 2253-2261 (2014)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.