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"An Asynchronous FPGA Based on LEDR/4-Phase-Dual-Rail Hybrid Architecture."

Shota Ishihara et al. (2010)

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DOI: 10.1587/TRANSELE.E93.C.1338

access: closed

type: Journal Article

metadata version: 2020-04-11

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  persistent URL:
  - https://dblp.org/rec/journals/ieicet/IshiharaKHK10
Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama:
An Asynchronous FPGA Based on LEDR/4-Phase-Dual-Rail Hybrid Architecture. IEICE Trans. Electron. 93-C(8): 1338-1348 (2010)

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