"A 6 bit, 7 mW, 700 MS/s Subranging ADC Using CDAC and Gate-Weighted ..."

Hyunui Lee et al. (2013)

> Home

Details and statistics

DOI: 10.1587/TRANSFUN.E96.A.422

access: closed

type: Journal Article

metadata version: 2022-10-02

- view
  authority control:
- export record
  dblp key:
  - journals/ieicet/LeeAMM13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieicet/LeeAMM13
Hyunui Lee, Yusuke Asada, Masaya Miyahara, Akira Matsuzawa:
A 6 bit, 7 mW, 700 MS/s Subranging ADC Using CDAC and Gate-Weighted Interpolation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(2): 422-433 (2013)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.