"A VLSI Architecture for Output Probability Computations of HMM-Based ..."

Kazuhiro Nakamura et al. (2010)

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DOI: 10.1587/TRANSINF.E93.D.300

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type: Journal Article

metadata version: 2020-12-29

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Kazuhiro Nakamura, Masatoshi Yamamoto, Kazuyoshi Takagi, Naofumi Takagi:
A VLSI Architecture for Output Probability Computations of HMM-Based Recognition Systems with Store-Based Block Parallel Processing. IEICE Trans. Inf. Syst. 93-D(2): 300-305 (2010)

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