"A Low Area Overhead Design Method for High-Performance General-Synchronous ..."

Shimpei Sato et al. (2019)

> Home

Details and statistics

DOI: 10.1587/TRANSFUN.E102.A.1760

access: closed

type: Journal Article

metadata version: 2023-05-01

- view
  authority control:
- export record
  dblp key:
  - journals/ieicet/SatoSUT19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieicet/SatoSUT19
Shimpei Sato, Eijiro Sassa, Yuta Ukon, Atsushi Takahashi:
A Low Area Overhead Design Method for High-Performance General-Synchronous Circuits with Speculative Execution. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 102-A(12): 1760-1769 (2019)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.