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"VLSI Architecture for the Low-Computation Cycle and Power-Efficient ..."

Lan-Da Van, Chin-Teng Lin, Yuan-Chu Yu (2007)

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DOI: 10.1093/IETFEC/E90-A.8.1644

access: closed

type: Journal Article

metadata version: 2020-04-11

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  - https://dblp.org/rec/journals/ieicet/VanLY07
Lan-Da Van, Chin-Teng Lin, Yuan-Chu Yu:
VLSI Architecture for the Low-Computation Cycle and Power-Efficient Recursive DFT/IDFT Design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(8): 1644-1652 (2007)

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