"A Built-in Test Circuit for Electrical Interconnect Testing of Open ..."

Widianto et al. (2016)

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DOI: 10.1587/TRANSINF.2015EDP7273

access: closed

type: Journal Article

metadata version: 2020-04-11

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Widianto, Masaki Hashizume, Shohei Suenaga, Hiroyuki Yotsuyanagi, Akira Ono, Shyue-Kung Lu, Zvi Roth:
A Built-in Test Circuit for Electrical Interconnect Testing of Open Defects in Assembled PCBs. IEICE Trans. Inf. Syst. 99-D(11): 2723-2733 (2016)

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