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"Highly scalable IP core to accelerate the forward/backward modified ..."

Peter Malík (2011)

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DOI: 10.1049/IET-CDS.2010.0223

access: closed

type: Journal Article

metadata version: 2020-09-10

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Peter Malík:
Highly scalable IP core to accelerate the forward/backward modified discrete cosine transform in MP3 implemented to FPGA and low-power ASIC. IET Circuits Devices Syst. 5(5): 351-359 (2011)

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