"Analysis of the reconfiguration latency and energy overheads for a Xilinx ..."

Javier Olivito et al. (2018)

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DOI: 10.1049/IET-CDT.2016.0095

access: closed

type: Journal Article

metadata version: 2024-07-16

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Javier Olivito, Felipe Serrano, Juan Antonio Clemente, Hortensia Mecha, Javier Resano:
Analysis of the reconfiguration latency and energy overheads for a Xilinx Virtex-5 field-programmable gate array. IET Comput. Digit. Tech. 12(4): 150-157 (2018)

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