"Architecture design, performance analysis and VLSI implementation of a ..."

Ling Wu, Cheng Li (2009)

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DOI: 10.1002/DAC.966

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type: Journal Article

metadata version: 2020-09-07

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Ling Wu, Cheng Li:
Architecture design, performance analysis and VLSI implementation of a reconfigurable shared buffer for high-speed switch/router. Int. J. Commun. Syst. 22(2): 159-186 (2009)

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