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"Software-hardware co-design for accelerating large-scale graph ..."
Shaolin Ran et al. (2023)
- Shaolin Ran, Beizhen Zhao, Xing Dai, Cheng Cheng, Yong Zhang:

Software-hardware co-design for accelerating large-scale graph convolutional network inference on FPGA. Neurocomputing 532: 129-140 (2023)

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